Qu, S., Liu, Y. (Ed.) Wafer-Level Chip-Scale Packaging

Shichun Qu • Yong Liu.
Wafer-Level Chip-Scale Packaging.
Analog and Power Semiconductor Applications.
ISBN: 978-1-4939-1555-2 ISBN: 978-1-4939-1556-9 (eBook).
DOI 10.1007/978-1-4939-1556-9.
Springer New York Heidelberg Dordrecht London.
Library of Congress Control Number: 2014946821.
# Springer Science+Business Media New York 2015.
A wafer-level chip-scale package (WLCSP) is a bare die package that offers not.
only the smallest possible footprints in all IC package forms, but also superior.
electrical and thermal performance, mostly credited to the direct solder interconnections.
that are low in electrical and thermal resistance and low in inductance.
between chip and application PCB it is assembled on. For mobile electronics, where.
performance needs to be high and size must be small, heat dissipation is limited to.
the conduction through PCB to the case of the mobile device; WLCSP is the best.
chip package option that balances the seemingly conflicting requirements.
Coming up with years of experience in semiconductor packaging, and with focus.
on wafer-level packaging, the authors attempted to provide well-balanced and yet.
up-to-date content in ten chapters. We wish this book is a good starting material for.
young engineers who need to learn the most important of WLCSP technology in a.
short time. At the same time, we also hope that seasoned engineers find this book.
good references for them to not only keep up with the rapid technology advancement,
but also to help address daily engineering challenges.