Scheffer L., Lavagno L., Martin G. (eds.) EDA for IC System Design, Verification, and Testing

Springer, 2006. — 512.Electronic Design Automation (EDA) is a spectacular success in the art of engineering. Over the last quarter of a century, improved tools have raised designers’ productivity by a factor of more than a thousand. Without EDA, Moore’s law would remain a useless curiosity. Not a single billion-transistor chip could be designed or debugged without these sophisticated tools — without EDA we would have no laptops, cell phones, video games, or any of the other electronic devices we take for granted.
Spurred on by the ability to build bigger chips, EDA developers have largely kept pace, and these enormous chips can still be designed, debugged, and tested, even with decreasing time-to-market.
The story of EDA is much more complex than the progression of integrated circuit (IC) manufacturing, which is based on simple physical scaling of critical dimensions. EDA, on the other hand, evolves by a series of paradigm shifts. Every chapter in this book, all 49 of them, was just a gleam in some expert’s eye just a few decades ago. Then it became a research topic, then an academic tool, and then the focus of a start-up or two. Within a few years, it was supported by large commercial EDA vendors, and is now part of the conventional wisdom. Although users always complain that today’s tools are not quite adequate for today’s designs, the overall improvements in productivity have been remarkable. After all, in which other field do people complain of only a 21% compound annual growth in productivity, sustained over three decades, as did the International Technology Roadmap for Semiconductors in 1999?
And what is the future of EDA tools? As we look at the state of electronics and IC design in 2005–2006, we see that we may soon enter a major period of change in the discipline. The classical scaling approach to ICs, spanning multiple orders of magnitude in the size of devices over the last 40+ years, looks set to last only a few more generations or process nodes (though this has been argued many times in the past, and has invariably been proved to be too pessimistic a projection). Conventional transistors and wiring may well be replaced by new nano- and biologically based technologies that we are currently only beginning to experiment with. This profound change will surely have a considerable impact on the tools and methodologies used to design ICs. Should we be spending our efforts looking at Computer Aided Design (CAD) for these future technologies, or continue to improve the tools we currently use?
Upon further consideration, it is clear that the current EDA approaches have a lot of life left in them. With at least a decade remaining in the evolution of current design approaches, and hundreds of thousands or millions of designs left that must either craft new ICs or use programmable versions of them, it is far too soon to forget about today’s EDA approaches. And even if the technology changes to radically new forms and structures, many of today’s EDA concepts will be reused and built upon for design of technologies well beyond the current scope and thinking.
The field of EDA for ICs has grown well beyond the point where any single individual can master it all, or even be aware of the progress on all fronts. Therefore, there is a pressing need to create a snapshot of this extremely broad and diverse subject. Students need a way of learning about the many disciplines and topics involved in the design tools in widespread use today. As design grows multi-disciplinary, electronics designers and EDA tool developers need to broaden their scope. The methods used in one subtopic may well have applicability to new topics as they arise. All of electronics design can utilize a comprehensive reference work in this field.
With this in mind, we invited many experts from across all the disciplines involved in EDA to contribute chapters summarizing and giving a comprehensive overview of their particular topic or field. As might be appreciated, such chapters represent a snapshot of the state of the art in 2004–2005. However, as surveys and overviews, they retain a lasting educational and reference value that will be useful to students and practitioners for many years to come.
With a large number of topics to cover, we decided to split the Handbook into two volumes. Volume One (/file/1876104/) covers system-level design, micro-architectural design, and verification and test. Volume Two (/file/1876107/) covers the classical “RTL to GDS II” design flow, incorporating synthesis, placement and routing, along with related topics; analog and mixed-signal design, physical verification, analysis and extraction, and technology CAD topics for IC design. These roughly correspond to the classical “front-end/back-end” split in IC design, where the front-end (or logical design) focuses on making sure that the design does the right thing, assuming it can be implemented, and the back-end (or physical design) concentrates on generating the detailed tooling required, while taking the logical function as given. Despite limitations, this split has persisted through the years — a complete and correct logical design, independent of implementation, remains an excellent handoff point between the two major portions of an IC design flow. Since IC designers and EDA developers often concentrate on one side of this logical/physical split, this seemed to be a good place to divide the book as well.
In particular, Volume One starts with a general introduction to the topic, and an overview of IC design and EDA. System-level design incorporates many aspects — application-specific tools and methods, special specification and modeling languages, integration concepts including the use of Intellectual Property (IP), and performance evaluation methods; the modeling and choice of embedded processors and ways to model software running on those processors; and high-level synthesis approaches. ICs that start at the system level need to be refined into micro-architectural specifications, incorporating cycle-accurate modeling, power estimation methods, and design planning. As designs are specified and refined, verification plays a key role — and the handbook covers languages, simulation essentials, and special verification topics such as transaction-level modeling, assertion-based verification, and the use of hardware acceleration and emulation as well as emerging formal methods. Finally, making IC designs testable and thus cost-effective to manufacture and package relies on a host of test methods and tools, both for digital and analog and mixed-signal designs.
This handbook with its two constituent volumes is a valuable learning and reference work for everyone involved and interested in learning about electronic design and its associated tools and methods. We hope that all readers will find it of interest and that it will become a well-thumbed resource.Section I Introduction
Overview
The Integrated Circuit Design Process and Electronic Design Automation
Section II System Level Design
Tools and Methodologies for System-Level Design
System-Level Specification and Modeling Languages
SoC Block-Based Design and IP Assembly
Performance Evaluation Methods for Multiprocessor System-on-Chip Design
System-Level Power Management
Processor Modeling and Design Tools
Embedded Software Modeling and Design
Using Performance Metrics to Select Microprocessor Cores for IC Designs
Parallelizing High-Level Synthesis: A Code Transformational Approach to High-Level Synthesis
Section III Micro-Architecture Design
Cycle-Accurate System-Level Modeling and Performance Evaluation
Micro-Architectural Power Estimation and Optimization
Design Planning
Section IV Logical Verification
Design and Verification Languages
Digital Simulation
Using Transactional-Level Models in an SoC Design Flow
Assertion-Based Verification
Hardware Acceleration and Emulation
Formal Property Verification
Section V Test
Design-For-Test
Automatic Test Pattern Generation
Analog and Mixed Signal Test