Ma Y., Kan E. Non-logic Devices in Logic Processes

New York: Springer, 2017. — 285 p. — ISBN: 978-3-319-48339-9.This book shows readers how to design semiconductor devices using the most common and lowest cost logic CMOS processes. Readers will benefit from the author’s extensive, industrial experience and the practical approach he describes for designing efficiently semiconductor devices that typically have to be implemented using specialized processes that are expensive, time-consuming, and low-yield. The author presents an integrated picture of semiconductor device physics and manufacturing techniques, as well as numerous practical examples of device designs that are tried and true.Basics.The Semiconductor Industry.
Moore’s Law and Its Corollaries.
Aim and Scope of This Book.
Overview of Logic CMOS Devices.
Basic CMOS Devices and Processes.
Physics of Diodes.
MOS Capacitors and Oxide Device Physics.
MOSFET Physics.
CMOS Circuits and Power Consumption.
Non-logic CMOS Devices Discussed in This Book.
Overview of Logic CMOS Processes.
Generic Logic CMOS Processes.
Layout and Mask Generation.
Design Rules.
Extension of Logic CMOS Processes.
Process Control.
Postprocessing.
Wafer Processing Economics.Non-logic Device Design in Logic Processes.
Non-logic MOSFETs in Logic CMOS Processes.MOSFETs with Nonstandard Threshold Voltages.
High-Voltage MOSFET.
Floating-Gate Devices in Logic CMOS Processes.Floating-Gate Transistors.
Floating-Gate Capacitor.
Semifloating Embedded DRAM Cell.
Concluding Remarks.
Bipolar Transistors in Logic CMOS Processes.Parasitic Bipolar Transistors.
Reference Circuits Using Parasitic BJTs.
Punchthrough Transistor.
Diodes in Logic CMOS Processes.Polysilicon Diodes.
Schottky Diodes.Selected Applications.
Logic Nonvolatile Memory.
Introduction to Embedded NVM.
Logic NVM.
Programming and Erase Methods.
Memory Cell Design Considerations.
Memory Arrays.
Memory Reliability.
An Application of LNVM.
One-Time Programmable Memories in Logic Processes.
Introduction to OTP Memory.
Polysilicon Fuse.
Antifuse-Based OTP.
Floating-Gate OTP Memory.
Multiple-Times Programmable Logic Nonvolatile Memory.A Medium Density Logic NVM.
Low Density, Low Power LNVM.
Multiple-Times Programmable NVM Latch.
Charge-Trapping Memory.
Non-Data-Storage Applications.DAC with Floating-Gate Trimming.
Adaptive Floating-Gate Comparator and Applications.
RFID Applications.
Neuromorphic Computing with Floating-Gate Devices.
CMOS Biosensors.Integrated Sensors: Amperometric or Field Effect.
Circuit Models for Ci/MOS FET-Based Sensors.
Sample Sensor Measurements.
Summary and Further Reading.
Waveform Shaping Structures and Transmission Lines on CMOS.CMOS Scaling to Distributive Effects in Digital Links.
CMOS Distributive Transmission Lines and Waveguides.
Capacitive Loading for Semidiscrete Transmission Lines and Nonlinear Transmission Lines.
Lumped-Element Transmission Lines and NLTLs.Conclusions and Outlook.Continued Scaling with FinFET.
Emerging Memories.
New Computing Paradigms.