Al-Hashimi Bashir M., Merrett Geoff V. (eds.) Many-Core Computing. Hardware and software

New York: The Institution of Engineering and Technology, 2019. — 600 p. — ISBN: 978-1-78561-582-5.Computing is moving away from a focus on performance-centric serial computation, and instead towards energy-efficient parallel computation. This has the potential to lead to continued performance increases without increasing clock frequencies and overcoming the thermal and power limitations of the dark-silicon era. As the number of parallel cores increases, we are transitioning to many-core computing. There is considerable interest in developing methods, tools, architectures and applications to support the many-core computing paradigm.The primary aim of this edited book is to provide a timely and coherent account of the recent advances in many-core computing research. Starting with programming models, operating systems and their applications; the authors present runtime management techniques, followed by system modelling, verification and testing methods, and architectures and systems. The book ends with some examples of innovative applications.Programming models, OS and applications
HPC with many core processors
Xavier Martorell, Jorge Bellon, Victor Lopez, Vicenç Beltran, Sergi Mateo, Xavier Teruel, Eduard Ayguade, and Jesus Labarta
MPI+OmpSs interoperability
The interposition library
Implementation of the MPI+OmpSs interoperability
Solving priority inversion
Putting it all together
Machine characteristics
Evaluation of NTChem
Evaluation with Linpack
Conclusions and future directionsFrom irregular heterogeneous software to reconfigurable hardware
John Wickerson and George A. Constantinides
Outline
Background
The performance implications of mapping atomic operations to reconfigurable hardware
Shared virtual memory
Weakly consistent atomic operations
Mapping weakly consistent atomic operations to reconfigurable hardware
Conclusion and future directions
AcknowledgementsOperating systems for many-core systems
Hendrik Borghorst and Olaf SpinczykKernel-state synchronization bottleneck
Non-uniform memory access
Core partitioning and management
Integration of heterogeneous computing resources
Reliability challenges
Energy management
Conclusions and future directionsDecoupling the programming model from resource management in throughput processors
Nandita Vijaykumar, Kevin Hsieh, Gennady Pekhimenko, Samira Khan, Ashish Shrestha, Saugata Ghose, Adwait Jog, Phillip B. Gibbons, and Onur MutluBackground
Motivation
Zorua: our approach
Zorua: detailed mechanism
Methodology
Evaluation
Other applications
Related work
Conclusion and future directionsTools and workloads for many-core computing
Amit Kumar Singh, Piotr Dziurzanski, Geoff V. Merrett, and Bashir M. Al-Hashimi
Single-chip multi/many-core systems
Multi-chip multi/many-core systems
Discussion
Conclusion and future directionsHardware and software performance in deep learning
Andrew Anderson, James Garland, Yuan Wen, Barbara Barabasz, Kaveena Persand, Aravind Vasudevan, and David Gregg
Deep neural networks
DNN convolution
Hardware acceleration and custom precision
Sparse data representations
Program generation and optimization for DNNs
Conclusion and future directions
AcknowledgementsRuntime management
Adaptive–reflective middleware for power and energy management in many-core heterogeneous systems
Tiago Mück, Amir M. Rahmani, and Nikil Dutt
The adaptive–reflective middleware framework
The reflective framework
Implementation and tools
Case studies
Conclusion and future directionsAdvances in power management of many-core processors
Andrea Bartolini and Davide Rossi
Parallel ultra-low power computing
HPC architectures and power management systemsRuntime thermal management of many-core systems
Anup Das and Akash Kumar
Thermal management of many-core embedded systems
Thermal management of 3D many-core systems
Conclusions and future directionsAdaptive packet processing on CPU–GPU heterogeneous platforms
Arian Maghazeh, Petru Eles, Zebo Peng, Alexandru Andrei, Unmesh D. Bordoloi, and Usman Dastgeer
Background on GPU computing
Packet processing on the GPU
Persistent kernel
Case study
Conclusion and future directionsFrom power-efficient to power-driven computing
Rishad Shafik and Alex Yakovlev
Computing is evolving
Power-driven computing
Design-time considerations
Run-time considerations
A case study of power-driven computing
Existing research
Research challenges and opportunities
Conclusion and future directionsSystem modelling, verification, and testing
Modelling many-core architectures
Guihai Yan, Jiajun Li, and Xiaowei LiScale-out vs. scale-up
Modelling scale-out many-core
Modelling scale-up many-core
The interactions between scale-out and scale-up
Power efficiency model
Runtime management
Conclusion and future directions
AcknowledgementsPower modelling of multicore systems
Matthew J. Walker, Geoff V. Merrett, and Bashir Al-Hashimi
CPU power consumption
CPU power management and energy-saving techniques
Approaches and applications
Developing top-down power models
Accuracy of bottom-up power simulators
Hybrid techniques
Conclusion and future directionsDeveloping portable embedded software for multicore systems through formal abstraction and refinement
Asieh Salehi Fathabadi, Mohammadsadegh Dalvandi, and Michael ButlerMotivation
RTM cross-layer architecture overview
Event-B
From identical formal abstraction to specific refinements
Code generation and portability support
Validation
Conclusion and future directionsSelf-testing of multicore processors
Michael A. Skitsas, Marco Restifo, Maria K. Michael, Chrysostomos Nicopoulos, Paolo Bernardi, and Ernesto Sanchez
General-purpose multicore systems
Processors-based systems-on-chip testing flows and techniques
Conclusion and future directionsAdvances in hardware reliability of reconfigurable many-core embedded systems
Lars Bauer, Hongyan Zhang, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, and Jörg Henkel
Background
Reliability guarantee with adaptive modular redundancy
Conclusion and future directions
AcknowledgementsArchitectures and systems
Manycore processor architectures
Prasenjit Chakraborty, Bharath Narasimha Swamy, and Preeti Ranjan PandaClassification of manycore architectures
Processor architecture
Integration
Conclusion and future directionsSilicon photonics enabled rack-scale many-core systems
Peng Yang, Zhehui Wang, Zhifei Wang, Xuanqi Chen, Luan H.K. Duong, and Jiang XuRelated work
RSON architecture
Communication flow and arbitration
Evaluations
Conclusions and future directionsCognitive I/O for 3D-integrated many-core system
Hao Yu, Sai Manoj Pudukotai Dinakarrao, and Hantao HuangCognitive I/O architecture for 3D memory-logic integration
I/O QoS model
Communication-QoS-based management
Performance-QoS-based management
Hybrid QoS-based management
Conclusion and future directionsApproximate computing across the hardware and software stacks
Muhammad Shafique, Osman Hasan, Rehan Hafiz, Sana Mazahir, Muhammad Abdullah Hanif, and Semeen RehmanComponent-level approximations for adders and multipliers
Probabilistic error analysis
Accuracy configurability and adaptivity in approximate computing systems
Multi-accelerator approximate computing architectures
Approximate memory systems and run-time management
A cross-layer methodology for designing approximate systems and the associated challengesMany-core systems for big-data computing
Sam Ainsworth and Timothy M. Jones
Workload characteristics
Many-core architectures for big data
The memory system
Programming models
Case studies
Other approaches to high-performance big data
Conclusion and future directionsBiologically-inspired massively-parallel computing
Steve Furber
In the beginning…
Where are we now?
So what is the problem?
Biology got there first
Bioinspired computer architecture
SpiNNaker – a spiking neural network architecture
SpiNNaker applications
Conclusion and future directions
Acknowledgements