Van Roermund A., Steyaert M., Huijsing J.H. (eds.) Analog Circuit Design: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers

New York: Springer, 2004. — 391 p.This book contains the contribution of 18 tutorials of the 12th Workshop on Advances in Analog Circuit Design. It is number 12 in the successful series of Analog Circuit Design, providing valuable information and excellent overviews of analog circuit design, CAD, and RF systems. The series can be seen as a reference to those involved in analog and mixed-signal design.
Each book discusses three specific topics on new and valuable design ideas in the area of analog circuit design. Each topic is discussed by six experts in the field and state-of-the-art information is shared and overviewed. In this 12th edition the topics are Fractional-N Synthesizers, Design for Robustness, and Line and Bus Drivers.
Analog Circuit Design is an essential reference source for analog design engineers and researchers that wish to keep abreast with the latest developments in the field. The tutorial coverage also makes it suitable for use in an advanced design course.Practical Design Aspects in Fractional- N Frequency Synthesis
Design and Simulation of Fractional-N Frequency Synthesizers
Monolithic CMOS Fractional-N Frequency Synthesizer Design for High Spectral Purity
A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesiser With 35Hz Frequency Step and Quantization Noise Compensation
Implementation Aspects of Fractional-N Techniques in Cellular Handsets
Fractional-N Phase Locked Loops and It’s Application in the GSM System
ESD for Analogue Circuit Design
ESD in Smart Power Processes
RF-ESD Co-Design for High Performance CMOS LNAs
Improvement of System Robustness Through EMC Optimization
Robustness in Analog Design
Minimizing Undesired Coupling and Interaction in Mixed Signal ICs
Looking to/for Low Power ADSL Drivers in the DSLAM
Class-AB Low-Distortion drivers for ADSL
Class D Self-Oscillating Line Drivers
Class G/H Line Drivers for xDSL
The USB 2.0 Physical Layer: Standard and Implementation
Backplane Transceivers